1. Field of the Invention
This invention relates to X-ray detectors. More particularly, it relates to an X-ray detecting device, and to a fabricating method thereof, having reduced ground line breakage.
2. Description of the Related Art
Generally, an X-ray imaging system photographs an object using X-ray sensitive film. Such systems have been useful in medical, scientific, and industrial applications. While photographic films have been useful, another X-ray imaging system that uses X-ray detecting panels to convert X-rays into electrical signals is becoming more common. Such an X-ray detecting panel is illustrated in FIG. 1. That panel includes a photo sensitive layer 6 for converting X-rays into electrical signals and a thin film transistor substrate 4 that selectively outputs those electrical signals.
The thin film transistor substrate 4 includes pixel electrodes 5 that are arranged in a pixel unit and thin film transistors (TFT's). Each thin film transistor is connected to a charging capacitor Cst, to a gate line 3, and to a data line (which is not shown). On the upper portion of the photosensitive layer 6 is a dielectric layer 7 and an upper electrode 8. The upper electrode is connected to a high voltage generator 9. The photosensitive layer 6 is comprised of selenium with a thickness of hundreds of μm. That layer detects incident X-rays and converts them into electrical signals. To do this, the photosensitive layer 6 produces electron-hole pairs in response to incident X-rays. The electron-hole pairs are separated by a high voltage (several kVs) applied to the upper electrode 8 by the high voltage generator 9. Separated charges are stored in the charging capacitor Cst by way of the pixel electrode 5. However, some of the separated charges accumulate on the surface of the pixel electrode 5. This reduces the charge stored in the charging capacitor Cst. In order to prevent such a reduction, a charge-blocking layer 11 is formed on the pixel electrodes 5. The thin film transistors (TFT) respond to gate signals input on the gate line 3 by applying pixel signals from the charging capacitors Cst to data lines. Those pixel signals are applied, via a data reproducer, to a display device that produces an image.
FIG. 2 is a plan view showing part of the thin film transistor substrate 4 of FIG. 1. Referring now to FIG. 2, in the thin film transistor substrate 4 each pixel electrode 5 is formed in a unit pixel area defined by gate lines 3 and data lines 10. Each charging capacitor Cst includes a storage electrode 25, a transparent electrode (which is not shown) above the storage electrode 25, and an interposed storage insulation layer 32. A ground line 22 crosses each pixel electrode 5. The ground line resets residual electric charges on the charging capacitor Cst.
Each thin film transistor (TFT) is formed at an intersection between a data line 10 and a gate line 3. Each TFT includes a gate electrode 12 that extends from a gate line 3, a source electrode 16 that extends from a data line 10, a drain electrode 14 that connects, via a drain contact hole 15, to a pixel electrode 5, and semiconductor layers (which are not shown) that connect to the source electrode 16 and to the drain electrode 14.
One end of each gate line 3 and one end of each data line 10 respectively have a gate pad 18 and a data pad 20. Those pads connect to a driving integrated circuit (IC). The gate line 3, the gate electrode 12 and the gate pad 18 are made from the same metallic structure. That structure is beneficially comprised of sequentially disposed aluminum (Al) and molybdenum (Mo). To produce good signal transfer characteristics, the data line 10 is beneficially comprised of a molybdenum metal. The data pad 20 has a structure similar to the gate pad 18. This enables connecting the driving IC using an Al wire bonding. Since the data pads 20 are formed on a level that is different than the data lines 10, the data pads connect to the driving IC(s) via a contact hole 21 that passes through a gate insulating film (which is not shown). The gate pads 18 and the data pads 20 have an Al layer that is exposed, respectively, through contact holes 13a and 13b. 
FIG. 3A to FIG. 3G are section views showing a method of fabricating the thin film transistor substrate shown in FIG. 2. First, as shown in FIG. 3A, the gate electrode 12 is formed by sequentially depositing an Al metal 12a and a Mo metal 12b on a substrate 2, and then patterning those metals.
As shown in FIG. 3B, a gate insulating film 32, an active layer 34a, and an ohmic contact layer 34b are then formed by depositing an insulating material and first and second semiconductor layers over the entire surface of the substrate 2 (including over the gate electrode 12), and then patterning the first and second semiconductor layers to form a semiconductor structure 34.
After formation of the semiconductor structure 34, as shown in FIG. 3C, a transparent drain electrode 17 and the storage electrode 25 are formed by depositing and patterning a transparent conductive material over the gate insulating film 32. Then, as shown in FIG. 3D, the source electrode 16, the drain electrode 14, and the ground line 22 are formed by depositing a data metal film over the substrate 2 (including over the transparent drain electrode 17 and over the storage electrode 25) and then patterning the data metal film. The drain electrode 14, the transparent drain electrode 17, and the ground line 22 electrically contact the storage electrode 25. Referring now to FIG. 3F, a storage insulating layer 36 is then formed by depositing an insulating material over the gate insulating film 32 in such a manner as to cover the source electrode 16, the drain electrode 14 and the ground line 22.
As shown in FIG. 3E, a transparent storage electrode 35 is then formed by depositing a transparent conductive material over the storage insulating layer 36, and then patterning that transparent conductive material. Subsequently, as shown in FIG. 3F, a drain contact hole 15, and first and second storage contact holes 19a and 19b are formed by depositing an insulating material over the storage insulating layer 36 to form a protective layer 40, and then patterning that protective layer 40 to form the holes.
Finally, as shown in FIG. 3G, a pixel electrode 5 that is electrically connected to the transparent drain electrode 17 and to the transparent storage electrode 35 is then formed by depositing a transparent conductive material onto the protective film 40, and then patterning that transparent conductive material.
Referring now to FIG. 2, the storage electrode 25 and the gate line 3 are spaced at a desired distance H. Thus, the storage electrode 25 is formed on the gate insulating film 32 (see FIG. 3C) in such a manner as to produce a step as shown in FIG. 4. If a ground line 22 is formed on the storage electrode 25 over the step breaking the ground line 22 at the step can occur.